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authorChristian Ehrhardt <[email protected]>2007-12-18 14:07:38 +0100
committerAvi Kivity <[email protected]>2007-12-18 18:34:16 +0200
commitf067512c0616d88db2fcd6004d03e41548fa1ab2 (patch)
treef47cffaf51adbed5c245adc1143b444635a8c878 /target-ia64
parente71ca04f280403f47bd3a252dd12252cfd3824b2 (diff)
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Sync icache for more architectures
A ia64 patch introduced kvm_sync_icache within a ifdef __ia64__, but the concept of split caches is not bound to ia64. This patch replaces the the call to kvm_synch_icache by the flush_icache_range function that is already available in qemu for ia64 and ppc (noop for x86). The call now depends on USE_KVM. Signed-off-by: Christian Ehrhardt <[email protected]> Signed-off-by: Avi Kivity <[email protected]>
Diffstat (limited to 'target-ia64')
-rw-r--r--target-ia64/cpu.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/target-ia64/cpu.h b/target-ia64/cpu.h
index 7349e94b4..be409c7b9 100644
--- a/target-ia64/cpu.h
+++ b/target-ia64/cpu.h
@@ -73,9 +73,4 @@ CPUState *cpu_ia64_init(void);
#include "cpu-all.h"
-/* IA64 has seperate I/D cache, with coherence maintained by DMA controller.
- * So to emulate right behavior that guest OS is assumed, we need to flush
- * I/D cache here.
- */
-void kvm_sync_icache(unsigned long address, int len);
#endif